「Low-density parity-check code」を編集中
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ビットストリング「101」は、符号語「101011」の最初の3ビットとして検出される。 | ビットストリング「101」は、符号語「101011」の最初の3ビットとして検出される。 | ||
| − | == | + | == Example Encoder == |
| − | + | Figure 1 illustrates the functional components of most LDPC encoders. | |
| − | [[ | + | [[File:ext_38dKJsdjh_LDPC encoder Figure.png|thumb|none|500px|Fig. 1. LDPC Encoder]] |
| − | + | During the encoding of a frame, the input data bits (D) are repeated and distributed to a set of constituent encoders. The constituent encoders are typically accumulators and each accumulator is used to generate a parity symbol. A single copy of the original data (S<sub>0,K-1</sub>) is transmitted with the parity bits (P) to make up the code symbols. The S bits from each constituent encoder are discarded. | |
| − | + | The parity bit may be used within another constituent code. | |
| − | DVB- | + | In an example using the DVB-S2 rate 2/3 code the encoded block size is 64800 symbols (N=64800) with 43200 data bits (K=43200) and 21600 parity bits (M=21600). Each constituent code (check node) encodes 16 data bits except for the first parity bit which encodes 8 data bits. The first 4680 data bits are repeated 13 times (used in 13 parity codes), while the remaining data bits are used in 3 parity codes (irregular LDPC code). |
| − | + | For comparison, classic turbo codes typically use two constituent codes configured in parallel, each of which encodes the entire input block (K) of data bits. These constituent encoders are recursive convolutional codes (RSC) of moderate depth (8 or 16 states) that are separated by a code interleaver which interleaves one copy of the frame. | |
| − | + | The LDPC code, in contrast, uses many low depth constituent codes (accumulators) in parallel, each of which encode only a small portion of the input frame. The many constituent codes can be viewed as many low depth (2 state) 'convolutional codes' that are connected via the repeat and distribute operations. The repeat and distribute operations perform the function of the interleaver in the turbo code. | |
| − | + | The ability to more precisely manage the connections of the various constituent codes and the level of redundancy for each input bit give more flexibility in the design of LDPC codes, which can lead to better performance than turbo codes in some instances. Turbo codes still seem to perform better than LDPCs at low code rates, or at least the design of well performing low rate codes is easier for Turbo Codes. | |
| − | + | As a practical matter, the hardware that forms the accumulators is reused during the encoding process. That is, once a first set of parity bits are generated and the parity bits stored, the same accumulator hardware is used to generate a next set of parity bits. | |
==デコード== | ==デコード== | ||
